View LTC1435CS_3499299.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

1 ltc1435 high efficiency low noise synchronous step-down switching regulator figure 1. high efficiency step-down converter features descriptio n u n dual n-channel mosfet synchronous drive n programmable fixed frequency n wide v in range: 3.5v to 36v operation n ultrahigh efficiency n very low dropout operation: 99% duty cycle n low standby current n secondary feedback control n programmable soft start n remote output voltage sense n logic controlled micropower shutdown: i q < 25 m a n foldback current limiting (optional) n current mode operation for excellent line and load transient response n output voltages from 1.19v to 9v n available in 16-lead narrow so and ssop packages the ltc ? 1435 is a synchronous step-down switching regulator controller that drives external n-channel power mosfets using a fixed frequency architecture. burst mode tm operation provides high efficiency at low load currents. a maximum duty cycle limit of 99% provides low dropout operation which extends operating time in bat- tery-operated systems. the operating frequency is set by an external capacitor allowing maximum flexibility in optimizing efficiency. a secondary winding feedback control pin, sfb, guarantees regulation regardless of load on the main output by forcing continuous operation. burst mode operation is inhibited when the sfb pin is pulled low which reduces noise and rf interference. soft start is provided by an external capacitor which can be used to properly sequence supplies. the operating current level is user-programmable via an external current sense resistor. wide input supply range allows operation from 3.5v to 30v (36v maximum). , ltc and lt are registered trademarks of linear technology corporation. burst mode is a trademark of linear technology corporation. n notebook and palmtop computers, pdas n cellular telephones and wireless modems n portable instruments n battery-operated devices n dc power distribution systems applicatio n s u typical applicatio n u i th tg c osc 68pf c c 330pf 100pf r c 10k c ss 0.1 f sense sense + ltc1435 1000pf + 4.7 f d b cmdsh-3 c b 0.1 f m2 si4412dy d1 mbrs140t3 l1 10 h m1 si4412dy r sense 0.033 + c in 22 f 35v 2 v in 4.5v to 28v + c out 100 f 10v 2 r1 32.4k r2 22.1k v out 2.9v/3.5a pgnd bg c osc v in v osense boost 1435 f01 sgnd run/ss sw intv cc
2 ltc1435 absolute m axi m u m ratings w ww u package/order i n for m atio n w u u order part number input supply voltage (v in )......................... 36v to C 0.3v topside driver supply voltage (boost) ...... 42v to C 0.3v switch voltage (sw)............................. v in + 5v to C 5v extv cc voltage ........................................ 10v to C 0.3v sense + , sense C voltages ......... intv cc + 0.3v to C 0.3v i th , v osense voltages .............................. 2.7v to C 0.3v sfb, run/ss voltages .............................. 10v to C 0.3v peak driver output current < 10 m s (tg, bg) ............. 2a intv cc output current ........................................ 50ma operating ambient temperature range ltc1435c............................................... 0 c to 70 c ltc1435i ............................................ C 40 c to 85 c junction temperature (note 1)............................. 125 c storage temperature range ................. C 65 c to 150 c lead temperature (soldering, 10 sec).................. 300 c ltc1435cg LTC1435CS ltc1435ig ltc1435is t a = 25 c, v in = 15v, v run/ss = 5v unless otherwise noted. electrical characteristics symbol parameter conditions min typ max units main control loop i in v osense feedback current (note 2) 10 50 na v osense feedback voltage (note 2) l 1.178 1.19 1.202 v d v linereg reference voltage line regulation v in = 3.6v to 20v (note 2) 0.002 0.01 %/v d v loadreg output voltage load regulation i th sinking 5 m a (note 2) l 0.5 0.8 % i th sourcing 5 m a l C 0.5 C 0.8 % v sfb secondary feedback threshold v sfb ramping negative l 1.16 1.19 1.22 v i sfb secondary feedback current v sfb = 1.5v C 1 C 2 m a v ovl output overvoltage lockout 1.24 1.28 1.32 v i q input dc supply current extv cc = 5v (note 3) normal mode 3.6v < v in < 30v 260 m a shutdown v run/ss = 0v, 3.6v < v in < 15v 16 25 m a v run/ss run pin threshold l 0.8 1.3 2 v i run/ss soft start current source v run/ss = 0v 1.5 3 4.5 m a d v sense(max) maximum current sense threshold v osense = 0v, 5v 130 150 180 mv tg transition time tg t r rise time c load = 3000pf 50 150 ns tg t f fall time c load = 3000pf 50 150 ns bg transition time bg t r rise time c load = 3000pf 50 150 ns bg t f fall time c load = 3000pf 40 150 ns internal v cc regulator v intvcc internal v cc voltage 6v < v in < 30v, v extvcc = 4v l 4.8 5.0 5.2 v v ldo int intv cc load regulation i intvcc = 15ma, v extvcc = 4v C 0.2 C 1 % v ldo ext extv cc voltage drop i intvcc = 15ma, v extvcc = 5v 130 230 mv v extvcc extv cc switchover voltage i intvcc = 15ma, v extvcc ramping positive l 4.5 4.7 v oscillator f osc oscillator frequency c osc = 100pf (note 4) 112 125 138 khz top view s package 16-lead plastic so g package 16-lead plastic ssop 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 c osc run/ss i th sfb sgnd v osense sense sense + tg boost sw v in intv cc bg pgnd extv cc t jmax = 125 c, q ja = 130 c/ w (g) t jmax = 125 c, q ja = 110 c/ w (s) consult factory for military grade parts.
3 ltc1435 electrical characteristics the l denotes specifications which apply over the full operating temperature range. ltc1435cg/LTC1435CS: 0 c t a 70 c ltc1435ig/ltc1435is: C 40 c t a 85 c note 1: t j is calculated from the ambient temperature t a and power dissipation p d according to the following formula: ltc1435cg/ltc1435ig: t j = t a + (p d )(130 c/w) LTC1435CS/ltc1435is: t j = t a + (p d )(110 c/w) note 2: the ltc1435 is tested in a feedback loop which servos v osense to the balance point for the error amplifier (v ith = 1.19v). note 3: dynamic supply current is higher due to the gate charge being delivered at the switching frequency. see applications information. note 4: oscillator frequency is tested by measuring the c osc charge and discharge currents and applying the formula: f osc (khz) = + ? 8.4(10 8 ) c osc (pf) + 11 () 1 i chg () 1 i dis t a = 25 c, v in = 15v, v run/ss = 5v unless otherwise noted. typical perfor m a n ce characteristics u w input voltage (v) 0 70 efficiency (%) 75 80 85 90 100 5 10 15 20 1435 g01 25 30 95 i load = 1a i load = 100ma v out = 3.3v efficiency vs input voltage v out = 3.3v v in C v out dropout voltage vs load current load current (a) 0 0 v in ?v out (v) 0.2 0.1 0.3 0.4 0.5 0.5 1.0 1.5 2.0 1435 g04 2.5 3.0 r sense = 0.033 w v out drop of 5% load current (a) 0.001 50 efficiency (%) 55 65 70 75 100 85 0.01 0.1 1 1435 g03 60 90 95 80 10 continuous mode v in = 10v v out = 5v r sense = 0.033 w burst mode operation efficiency vs load current v ith pin voltage vs output current output current (%) 0 v ith (v) 1.0 2.0 3.0 0.5 1.5 2.5 20 40 60 80 1435 g06 100 10 030507090 burst mode operation continuous mode input voltage (v) 0 70 efficiency (%) 75 80 85 90 100 5 10 15 20 1435 g02 25 30 95 i load = 1a i load = 100ma v out = 5v efficiency vs input voltage v out = 5v load regulation load current (a) 0 d v out (%) 0 0.5 1.0 1.5 2.0 1435 g05 2.5 3.0 0.25 0.50 0.75 ?.00 ?.25 ?.50 r sense = 0.033 w
4 ltc1435 typical perfor m a n ce characteristics u w input supply and shutdown current vs input voltage input voltage (v) 0 0 supply current (ma) shutdown current ( m a) 0.5 1.0 1.5 2.0 2.5 0 20 40 60 80 100 5 10 15 20 1435 g07 25 30 v out = 3.3v extv cc = open v out = 5v extv cc = v out shutdown extv cc switch drop vs intv cc load current intv cc load current (ma) 0 extv cc ?intv cc (mv) 120 160 200 16 1435 g09 80 40 100 140 180 60 20 0 4 8 12 218 6 10 14 20 ?5 c 25 c 70 c intv cc load current (ma) 0 d intv cc (%) 0 0.3 20 1435 g08 0.3 0.5 5 10 70 c 25 c 15 0.5 v extvcc = 0v intv cc regulation vs intv cc load current normalized oscillator frequency vs temperature temperature ( c) ?0 frequency (%) 5 10 35 85 1435 g10 f o ?5 10 60 110 135 ? ?0 run/ss pin current vs temperature temperature ( c) ?0 0 run/ss current ( m a) 1 2 3 4 ?5 10 35 60 1435 g11 85 110 135 sfb pin current vs temperature temperature ( c) ?0 sfb current ( m a) 0.50 0.25 0 35 85 1435 g12 0.75 ?.00 ?5 10 60 110 135 ?.25 ?.50 temperature ( c) ?0 146 current sense threshold (mv) 148 150 152 154 ?5 10 35 60 1435 g13 85 110 135 transient response transient response maximum current sense threshold voltage vs temperature v out 50mv/div i load = 50ma to 1a 1435 g14 i load = 1a to 3a 1435 g15 v out 50mv/div
5 ltc1435 typical perfor m a n ce characteristics u w soft start: load current vs time burst mode operation pi n fu n ctio n s uuu ever extv cc is higher than 4.7v. see extv cc connection in applications information section. do not exceed 10v on this pin. connect to v out if v out 3 5v. pgnd (pin 10): driver power ground. connects to source of bottom n-channel mosfet and the (C) terminal of c in . bg (pin 11): high current gate drive for bottom n-channel mosfet. voltage swing at this pin is from ground to intv cc . intv cc (pin 12): output of the internal 5v regulator and extv cc switch. the driver and control circuits are pow- ered from this voltage. must be closely decoupled to power ground with a minimum of 2.2 m f tantalum or electrolytic capacitor. v in (pin 13): main supply pin. must be closely decoupled to the ics signal ground pin. sw (pin 14): switch node connection to inductor. volt- age swing at this pin is from a schottky diode (external) voltage drop below ground to v in . boost (pin 15): supply to topside floating driver. the bootstrap capacitor is returned to this pin. voltage swing at this pin is from intv cc to v in + intv cc . tg (pin 16): high current gate drive for top n-channel mosfet. this is the output of a floating driver with a voltage swing equal to intv cc superimposed on the switch node voltage sw. c osc (pin 1): external capacitor c osc from this pin to ground sets the operating frequency. run/ss (pin 2): combination of soft start and run control inputs. a capacitor to ground at this pin sets the ramp time to full current output. the time is approximately 0.5s/ m f. forcing this pin below 1.3v causes the device to be shut down. in shutdown all functions are disabled. i th (pin 3): error amplifier compensation point. the current comparator threshold increases with this control voltage. nominal voltage range for this pin is 0v to 2.5v. sfb (pin 4): secondary winding feedback input. nor- mally connected to a feedback resistive divider from the secondary winding. this pin should be tied to: ground to force continuous operation; intv cc in applications that dont use a secondary winding; and a resistive divider from the output in applications using a secondary winding. sgnd (pin 5): small-signal ground. must be routed separately from other grounds to the (C) terminal of c out . v osense (pin 6): receives the feedback voltage from an external resistive divider across the output. sense C (pin 7): the (C) input to the current comparator. sense + (pin 8): the (+) input to the current comparator. built-in offsets between sense C and sense + pins in conjunction with r sense set the current trip thresholds. extv cc (pin 9): input to the internal switch connected to intv cc . this switch closes and supplies v cc power when- i load = 50ma 1435 g16 v out 20mv/div v ith 200mv/div 1435 g17 run/ss 5v/div inductor current 1a/div
6 ltc1435 fu n ctio n al diagra uu w + + + + switch logic drop out det 0.6v 1.19v q s r i1 intv cc 4k + 8k 180k 30k + + ea shutdown 6v 3 a 1.19v 1.28v + 4.8v v in shutdown 1.19v ref c ss c c r c run/ss 2 i th 3 d fb * sense + 7 8 sense extv cc 9 + r2 v osense ov 1 a osc pgnd 10 bg intv cc 12 sw 14 tg 16 boost sgnd v in 13 sfb 4 c osc 1 r sense + + v sec c sec v out c out d1 c b d b intv cc + c in v in c osc 5v ldo reg run soft start 1435 ?fd v fb r1 i2 g m = 1m * foldback current limiting option 5 6 11 15
7 ltc1435 (refer to functional diagram) operatio n u main control loop the ltc1435 uses a constant frequency, current mode step-down architecture. during normal operation, the top mosfet is turned on each cycle when the oscillator sets the rs latch, and turned off when the main current comparator i1 resets the rs latch. the peak inductor current at which i1 resets the rs latch is controlled by the voltage on the i th pin , which is the output of error amplifier ea. the v osense pin, described in the pin functions section, allows ea to receive an output feedback voltage v fb from an external resistive divider. when the load current increases, it causes a slight decrease in v fb relative to the 1.19v reference, which in turn causes the i th voltage to increase until the average inductor current matches the new load current. while the top mosfet is off, the bottom mosfet is turned on until either the inductor current starts to reverse, as indicated by current comparator i2, or the beginning of the next cycle. the top mosfet driver is biased from floating bootstrap capacitor c b , which normally is recharged during each off cycle. however, when v in decreases to a voltage close to v out , the loop may enter dropout and attempt to turn on the top mosfet continuously. the dropout detector counts the number of oscillator cycles that the top mosfet remains on and periodically forces a brief off period to allow c b to recharge. the main control loop is shut down by pulling the run/ss pin low. releasing run/ss allows an internal 3 m a current source to charge soft start capacitor c ss . when c ss reaches 1.3v, the main control loop is enabled with the i th voltage clamped at approximately 30% of its maximum value. as c ss continues to charge, i th is gradually re- leased allowing normal operation to resume. comparator ov guards against transient overshoots > 7.5% by turning off the top mosfet and keeping it off until the fault is removed. low current operation the ltc1435 is capable of burst mode operation in which the external mosfets operate intermittently based on load demand. the transition to low current operation begins when comparator i2 detects current reversal and turns off the bottom mosfet. if the voltage across r sense does not exceed the hysteresis of i2 (approximately 20mv) for one full cycle, then on following cycles the top and bottom drives are disabled. this continues until an induc- tor current peak exceeds 20mv/r sense or the i th voltage exceeds 0.6v, either of which causes drive to be returned to the tg pin on the next cycle. two conditions can force continuous synchronous opera- tion, even when the load current would otherwise dictate low current operation. one is when the common mode voltage of the sense + and sense C pins is below 1.4v and the other is when the sfb pin is below 1.19v. the latter condition is used to assist in secondary winding regulation as described in the applications information section. intv cc /extv cc power power for the top and bottom mosfet drivers and most of the other ltc1435 circuitry is derived from the intv cc pin. the bottom mosfet driver supply pin is internally connected to intv cc in the ltc1435. when the extv cc pin is left open, an internal 5v low dropout regulator supplies intv cc power. if extv cc is taken above 4.8v, the 5v regulator is turned off and an internal switch is turned on to connect extv cc to intv cc . this allows the intv cc power to be derived from a high efficiency external source such as the output of the regulator itself or a secondary winding, as described in the applications information section.
8 ltc1435 applicatio n s i n for m atio n wu u u the basic ltc1435 application circuit is shown in figure 1, high efficiency step-down converter. external compo- nent selection is driven by the load requirement and begins with the selection of r sense . once r sense is known, c osc and l can be chosen. next, the power mosfets and d1 are selected. finally, c in and c out are selected. the circuit shown in figure 1 can be configured for operation up to an input voltage of 28v (limited by the external mosfets). r sense selection for output current r sense is chosen based on the required output current. the ltc1435 current comparator has a maximum thresh- old of 150mv/r sense and an input common mode range of sgnd to intv cc . the current comparator threshold sets the peak of the inductor current, yielding a maximum average output current i max equal to the peak value less half the peak-to-peak ripple current d i l . allowing a margin for variations in the ltc1435 and external component values yields: r mv i sense max = 100 the ltc1435 works well with values of r sense from 0.005 w to 0.2 w . c osc selection for operating frequency the ltc1435 uses a constant frequency architecture with the frequency determined by an external oscillator capaci- tor c osc . each time the topside mosfet turns on, the voltage c osc is reset to ground. during the on-time, c osc is charged by a fixed current. when the voltage on the capacitor reaches 1.19v, c osc is reset to ground. the process then repeats. the value of c osc is calculated from the desired operating frequency: cpf osc () = ? ? 1.37(10 ) frequency (khz) 4 11 a graph for selecting c osc vs frequency is given in figure 2. as the operating frequency is increased the gate charge operating frequency (khz) c osc value (pf) 300 250 200 150 100 50 0 100 200 300 400 ltc1435 ?f02 500 0 figure 2. timing capacitor value losses will be higher, reducing efficiency (see efficiency considerations). the maximum recommended switching frequency is 400khz. inductor value calculation the operating frequency and inductor selection are inter- related in that higher operating frequencies allow the use of smaller inductor and capacitor values. so why would anyone ever choose to operate at lower frequencies with larger components? the answer is efficiency. a higher frequency generally results in lower efficiency because of mosfet gate charge losses. in addition to this basic trade-off, the effect of inductor value on ripple current and low current operation must also be considered. the inductor value has a direct effect on ripple current. the inductor ripple current d i l decreases with higher induc- tance or frequency and increases with higher v in or v out : d i fl v v v l out out in = ()( ) ? ? ? ? 1 1 accepting larger values of d i l allows the use of low inductances, but results in higher output voltage ripple and greater core losses. a reasonable starting point for setting ripple current is d i l = 0.4(i max ). remember, the maximum d i l occurs at the maximum input voltage. the inductor value also has an effect on low current operation. the transition to low current operation begins when the inductor current reaches zero while the bottom
9 ltc1435 applicatio n s i n for m atio n wu u u mosfet is on. lower inductor values (higher d i l ) will cause this to occur at higher load currents, which can cause a dip in efficiency in the upper range of low current operation. in burst mode operation, lower inductance values will cause the burst frequency to decrease. the figure 3 graph gives a range of recommended induc- tor values vs operating frequency and v out . kool m m is a registered trademark of magnetics, inc. ferrite. a reasonable compromise from the same manu- facturer is kool m m . toroids are very space efficient, especially when you can use several layers of wire. be- cause they generally lack a bobbin, mounting is more difficult. however, designs for surface mount are available which do not increase the height significantly. power mosfet and d1 selection two external power mosfets must be selected for use with the ltc1435: an n-channel mosfet for the top (main) switch and an n-channel mosfet for the bottom (synchronous) switch. the peak-to-peak gate drive levels are set by the intv cc voltage. this voltage is typically 5v during start-up (see extv cc pin connection). consequently, logic level thresh- old mosfets must be used in most ltc1435 applica- tions. the only exception is applications in which extv cc is powered from an external supply greater than 8v (must be less than 10v), in which standard threshold mosfets (v gs(th) < 4v) may be used. pay close attention to the bv dss specification for the mosfets as well; many of the logic level mosfets are limited to 30v or less. selection criteria for the power mosfets include the on resistance r sd(on) , reverse transfer capacitance c rss , input voltage and maximum output current. when the ltc1435 is operating in continuous mode the duty cycles for the top and bottom mosfets are given by: main switch duty cycle = v v synchronous switch duty cycle = v out in in - () v v out in the mosfet power dissipations at maximum output current are given by: p v v ir icf p vv v ir main out in max ds on max rss sync in out in max ds on = () + () + () ( )( )() = - () + () () () 2 185 2 1 1 d d k v in . inductor core selection once the value for l is known, the type of inductor must be selected. high efficiency converters generally cannot af- ford the core loss found in low cost powdered iron cores, forcing the use of more expensive ferrite, molypermalloy or kool m m ? cores. actual core loss is independent of core size for a fixed inductor value, but it is very dependent on inductance selected. as inductance increases, core losses go down. unfortunately, increased inductance requires more turns of wire and therefore copper losses will increase. ferrite designs have very low core loss and are preferred at high switching frequencies, so design goals can con- centrate on copper loss and preventing saturation. ferrite core material saturates hard, which means that induc- tance collapses abruptly when the peak design current is exceeded. this results in an abrupt increase in inductor ripple current and consequent output voltage ripple. do not allow the core to saturate! molypermalloy (from magnetics, inc.) is a very good, low loss core material for toroids, but it is more expensive than figure 3. recommended inductor values operating frequency (khz) 0 0 inductor value ( m h) 10 20 30 40 60 50 100 150 200 1435 f03 250 300 50 v out = 5.0v v out = 3.3v v out = 2.5v
10 ltc1435 applicatio n s i n for m atio n wu u u where d is the temperature dependency of r ds(on) and k is a constant inversely related to the gate drive current. both mosfets have i 2 r losses while the topside n-channel equation includes an additional term for tran- sition losses, which are highest at high input voltages. for v in < 20v the high current efficiency generally im- proves with larger mosfets, while for v in > 20v the transition losses rapidly increase to the point that the use of a higher r ds(on) device with lower c rss actual pro- vides higher efficiency. the synchronous mosfet losses are greatest at high input voltage or during a short circuit when the duty cycle in this switch is nearly 100%. refer to the foldback current limiting section for further applications information. the term (1 + d ) is generally given for a mosfet in the form of a normalized r ds(on) vs temperature curve, but d = 0.005/ c can be used as an approximation for low voltage mosfets. c rss is usually specified in the mosfet characteristics. the constant k = 2.5 can be used to estimate the contributions of the two terms in the main switch dissipation equation. the schottky diode d1 shown in figure 1 conducts during the dead-time between the conduction of the two large power mosfets. this prevents the body diode of the bottom mosfet from turning on and storing charge during the dead-time, which could cost as much as 1% in efficiency. a 1a schottky is generally a good size for 3a regulators. c in and c out selection in continuous mode, the source current of the top n-channel mosfet is a square wave of duty cycle v out / v in . to prevent large voltage transients, a low esr input capacitor sized for the maximum rms current must be used. the maximum rms capacitor current is given by: c required in ii vvv v rms max out in out in ? - () [] 12 / this formula has a maximum at v in = 2v out , where i rms = i out /2. this simple worst-case condition is com- monly used for design because even significant deviations do not offer much relief. note that capacitor manufacturers ripple current ratings are often based on only 2000 hours of life. this makes it advisable to further derate the capacitor or to choose a capacitor rated at a higher temperature than required. several capacitors may also be paralleled to meet size or height requirements in the design. always consult the manufacturer if there is any question. the selection of c out is driven by the required effective series resistance (esr). typically, once the esr require- ment is satisfied the capacitance is adequate for filtering. the output ripple ( d v out ) is approximated by: dd v i esr fc out l out ?+ ? ? ? ? 1 4 where f = operating frequency, c out = output capacitance and d i l = ripple current in the inductor. the output ripple is highest at maximum input voltage since d i l increases with input voltage. with d i l = 0.4i out(max) the output ripple will be less than 100mv at max v in assuming: c out required esr < 2r sense manufacturers such as nichicon, united chemicon and sanyo should be considered for high performance through- hole capacitors. the os-con semiconductor dielectric capacitor available from sanyo has the lowest esr(size) product of any aluminum electrolytic at a somewhat higher price. once the esr requirement for c out has been met, the rms current rating generally far exceeds the i ripple(p-p) requirement. in surface mount applications multiple capacitors may have to be paralleled to meet the esr or rms current handling requirements of the application. aluminum elec- trolytic and dry tantalum capacitors are both available in surface mount configurations. in the case of tantalum, it is critical that the capacitors are surge tested for use in switching power supplies. an excellent choice is the avx tps series of surface mount tantalum, available in case heights ranging from 2mm to 4mm. other capacitor types include sanyo os-con, nichicon pl series and sprague 593d and 595d series. consult the manufacturer for other specific recommendations.
11 ltc1435 additional circuitry is required to derive intv cc power from the output. the following list summarizes the four possible connec- tions for extv cc: 1. extv cc left open (or grounded). this will cause intv cc to be powered from the internal 5v regulator resulting in an efficiency penalty of up to 10% at high input voltages. 2. extv cc connected directly to v out . this is the normal connection for a 5v regulator and provides the highest efficiency. 3. extv cc connected to an output-derived boost network. for 3.3v and other low voltage regulators, efficiency gains can still be realized by connecting extv cc to an output-derived voltage which has been boosted to greater than 4.8v. this can be done with either the inductive boost winding as shown in figure 4a or the capacitive charge pump shown in figure 4b. the charge pump has the advantage of simple magnetics. 4. extv cc connected to an external supply. if an external supply is available in the 5v to 10v range (extv cc v in ), it may be used to power extv cc providing it is compatible with the mosfet gate drive requirements. when driving standard threshold mosfets, the exter- nal supply must always be present during operation to prevent mosfet failure due to insufficient gate drive. applicatio n s i n for m atio n wu u u intv cc regulator an internal p-channel low dropout regulator produces the 5v supply which powers the drivers and internal circuitry within the ltc1435. the intv cc pin can supply up to 15ma and must be bypassed to ground with a minimum of 2.2 m f tantalum or low esr electrolytic. good bypassing is necessary to supply the high transient currents required by the mosfet gate drivers. high input voltage applications, in which large mosfets are being driven at high frequencies, may cause the maximum junction temperature rating for the ltc1435 to be exceeded. the ic supply current is dominated by the gate charge supply current when not using an output derived extv cc source. the gate charge is dependent on operating frequency as discussed in the efficiency consid- erations section. the junction temperature can be esti- mated by using the equations given in note 1 of the electrical characteristics. for example, the ltc1435 is limited to less than 17ma from a 30v supply: t j = 70 c + (17ma)(30v)(100 c/w) = 126 c to prevent maximum junction temperature from being exceeded, the input supply current must be checked when operating in continuous mode at maximum v in . extv cc connection the ltc1435 contains an internal p-channel mosfet switch connected between the extv cc and intv cc pins. the switch closes and supplies the intv cc power when- ever the extv cc pin is above 4.8v, and remains closed until extv cc drops below 4.5v. this allows the mosfet driver and control power to be derived from the output during normal operation (4.8v < v out < 9v) and from the internal regulator when the output is out of regulation (start-up, short circuit). do not apply greater than 10v to the extv cc pin and ensure that extv cc < v in . significant efficiency gains can be realized by powering intv cc from the output, since the v in current resulting from the driver and control currents will be scaled by a factor of duty cycle/efficiency. for 5v regulators this supply means connecting the extv cc pin directly to v out . however, for 3.3v and other lower voltage regulators, figure 4a. secondary output loop and extv cc connection r6 r5 extv cc sfb sgnd v in tg bg pgnd ltc1435 n-ch n-ch + c in v in 1n4148 + 1 f + c out v sec l1 1:n r sense v out optional ext v cc connection 5v v sec 9v ltc1435 ?f04a sw
12 ltc1435 applicatio n s i n for m atio n wu u u extv cc v in tg bg pgnd ltc1435 n-ch n-ch + c in v in + c out l1 r sense v out + 1 f ltc1435 ?f04b vn2222ll bat85 bat85 bat85 0.22 f sw figure 4b. capacitive charge pump for extv cc topside mosfet driver supply (c b , d b ) an external bootstrap capacitor c b connected to the boost pin supplies the gate drive voltage for the topside mosfet. capacitor c b in the functional diagram is charged through diode d b from intv cc when the sw pin is low. when the topside mosfet is to be turned on, the driver places the c b voltage across the gate source of the mosfet. this enhances the mosfet and turns on the topside switch. the switch node voltage sw rises to v in and the boost pin rises to v in + intv cc . the value of the boost capacitor c b needs to be 100 times greater than the total input capaci- tance of the topside mosfet. in most applications 0.1 m f is adequate. the reverse breakdown on d b must be greater than v in(max). output voltage programming the output voltage is set by a resistive divider according to the following formula: vv r r out =+ ? ? ? ? 119 1 2 1 . the external resistor divider is connected to the output as shown in figure 5 allowing remote voltage sensing. run/ soft start function the run/ss pin is a dual purpose pin which provides the soft start function and a means to shut down the ltc1435. figure 6. run/ss pin interfacing ltc1435 ?f06 c ss d1 3.3v or 5v run/ss c ss run/ss soft start reduces surge currents from v in by gradually increasing the internal current limit. power supply se- quencing can also be accomplished using this pin. an internal 3 m a current source charges up an external capacitor c ss. when the voltage on run/ss reaches 1.3v the ltc1435 begins operating. as the voltage on run/ss continues to ramp from 1.3v to 2.4v, the internal current limit is also ramped at a proportional linear rate. the current limit begins at approximately 50mv/r sense (at v run/ss = 1.3v) and ends at 150mv/r sense (v run/ss > 2.7v). the output current thus ramps up slowly, charging the output capacitor. if run/ss has been pulled all the way to ground there is a delay before starting of approximately 500ms/ m f, followed by an additional 500ms/ m f to reach full current. t delay = 5(10 5 )c ss seconds pulling the run/ss pin below 1.3v puts the ltc1435 into a low quiescent current shutdown (i q < 25 m a). this pin can be driven directly from logic as shown in figure 6. diode d1 in figure 6 reduces the start delay but allows c ss to ramp up slowly for the soft start function; this diode and c ss can be deleted if soft start is not needed. the run/ss pin has an internal 6v zener clamp (see functional diagram). v osense ltc1435 r1 r2 ltc1435 ?f05 100pf 1.19v v out 9v sgnd figure 5. setting the ltc1435 output voltage
13 ltc1435 applicatio n s i n for m atio n wu u u foldback current limiting as described in power mosfet and d1 selection, the worst-case dissipation for either mosfet occurs with a short-circuited output, when the synchronous mosfet conducts the current limit value almost continuously. in most applications this will not cause excessive heating, even for extended fault intervals. however, when heat sinking is at a premium or higher r ds(on) mosfets are being used, foldback current limiting should be added to reduce the current in proportion to the severity of the fault. foldback current limiting is implemented by adding diode d fb between the output and the i th pin as shown in the functional diagram. in a hard short (v out = 0v) the current will be reduced to approximately 25% of the maximum output current. this technique may be used for all applications with regulated output voltages of 1.8v or greater. sfb pin operation when the sfb pin drops below its ground referenced 1.19v threshold, continuous mode operation is forced. in continuous mode, the large n-channel main and synchro- nous switches are used regardless of the load on the main output. in addition to providing a logic input to force continuous synchronous operation, the sfb pin provides a means to regulate a flyback winding output. continuous synchro- nous operation allows power to be drawn from the auxil- iary windings without regard to the primary output load. the sfb pin provides a way to force continuous synchro- nous operation as needed by the flyback winding. the secondary output voltage is set by the turns ratio of the transformer in conjunction with a pair of external resistors returned to the sfb pin as shown in figure 4a. the secondary regulated voltage, v sec , in figure 4a is given by: vnv r r sec out ?+ () >+ ? ? ? ? 1 1 19 1 6 5 . where n is the turns ratio of the transformer and v out is the main output voltage sensed by v osense . efficiency considerations the efficiency of a switching regulator is equal to the output power divided by the input power times 100%. it is often useful to analyze individual losses to determine what is limiting the efficiency and which change would produce the most improvement. efficiency can be expressed as: efficiency = 100% C (l1 + l2 + l3 + ...) where l1, l2, etc. are the individual losses as a percentage of input power. although all dissipative elements in the circuit produce losses, four main sources usually account for most of the losses in ltc1435 circuits. ltc1435 v in current, intv cc current, i 2 r losses, and topside mosfet transition losses. 1. the v in current is the dc supply current given in the electrical characteristics which excludes mosfet driver and control currents. v in current results in a small (< 1%) loss which increases with v in . 2. intv cc current is the sum of the mosfet driver and control currents. the mosfet driver current results from switching the gate capacitance of the power mosfets. each time a mosfet gate is switched from low to high to low again, a packet of charge dq moves from intv cc to ground. the resulting dq/dt is a current out of int v cc which is typically much larger than the control circuit current. in continuous mode, i gatechg = f(q t + q b ), where q t and q b are the gate charges of the topside and bottom side mosfets. by powering extv cc from an output-derived source, the additional v in current resulting from the driver and control currents will be scaled by a factor of duty cycle/efficiency. for example, in a 20v to 5v application, 10ma of intv cc current results in approxi- mately 3ma of v in current. this reduces the midcurrent loss from 10% or more (if the driver was powered directly from v in ) to only a few percent. 3. i 2 r losses are predicted from the dc resistances of the mosfet, inductor and current shunt. in continuous mode the average output current flows through l and r sense , but is chopped between the topside main
14 ltc1435 applicatio n s i n for m atio n wu u u only solution is to limit the rise time of the switch drive so that the load rise time is limited to approximately (25)(c load ). thus a 10 m f capacitor would require a 250 m s rise time, limiting the charging current to about 200ma. automotive considerations: plugging into the cigarette lighter as battery-powered devices go mobile, there is a natural interest in plugging into the cigarette lighter in order to conserve or even recharge battery packs during operation. but before you connect, be advised: you are plugging into the supply from hell. the main battery line in an automo- bile is the source of a number of nasty potential transients, including load dump, reverse battery and double battery. load dump is the result of a loose battery cable. when the cable breaks connection, the field collapse in the alternator can cause a positive spike as high as 60v which takes several hundred milliseconds to decay. reverse battery is just what it says, while double battery is a consequence of tow truck operators finding that a 24v jump start cranks cold engines faster than 12v. the network shown in figure 7 is the most straightfor- ward approach to protect a dc/dc converter from the ravages of an automotive battery line. the series diode prevents current from flowing during reverse battery, while the transient suppressor clamps the input voltage during load dump. note that the transient suppressor should not conduct during double battery operation, but must still clamp the input voltage below breakdown of the converter. although the lt1435 has a maximum input voltage of 36v, most applications will be limited to 30v by the mosfet bv dss . mosfet and the synchronous mosfet. if the two mosfets have approximately the same r ds(on) , then the resistance of one mosfet can simply be summed with the resistances of l and r sense to obtain i 2 r losses. for example, if each r ds(on) = 0.05 w , r l = 0.15 w , and r sense = 0.05 w , then the total resistance is 0.25 w . this results in losses ranging from 3% to 10% as the output current increases from 0.5a to 2a. i 2 r losses cause the efficiency to drop at high output currents. 4. transition losses apply only to the topside mosfet(s), and only when operating at high input voltages (typi- cally 20v or greater). transition losses can be esti- mated from: transition loss = 2.5 (v in ) 1.85 (i max )(c rss )(f) other losses, including c in and c out esr dissipative losses, schottky conduction losses during dead-time, and inductor core losses, generally account for less than 2% total additional loss. checking transient response the regulator loop response can be checked by looking at the load transient response. switching regulators take several cycles to respond to a step in dc (resistive) load current. when a load step occurs, v out immediately shifts by an amount equal to ( d i load )(esr), where esr is the effective series resistance of c out . d i load also begins to charge or discharge c out which generates a feedback error signal. the regulator loop then acts to return v out to its steady-state value. during this recovery time v out can be monitored for overshoot or ringing which would indi- cate a stability problem. the i th external components shown in the figure 1 circuit will provide adequate com- pensation for most applications. a second, more severe transient is caused by switching in loads with large (>1 m f) supply bypass capacitors. the discharged bypass capacitors are effectively put in paral- lel with c out , causing a rapid drop in v out . no regulator can deliver enough current to prevent this problem if the load switch resistance is low and it is driven quickly. the figure 7. automotive application protection 1435 f07 50a i pk rating ltc1435 transient voltage suppressor general instrument 1.5ka24a v in 12v
15 ltc1435 applicatio n s i n for m atio n wu u u design example as a design example, assume v in = 12v(nominal), v in = 22v(max), v out = 3.3v, i max = 3a and f = 250khz, r sense and c osc can immediately be calculated: r sense = 100mv/3a = 0.033 w c osc = 1.37(10 4 )/250 C 11 = 43pf referring to figure 3, a 10 m h inductor falls within the recommended range. to check the actual value of the ripple current the following equation is used: d i v fl v v l out out in = ()( ) ? ? ? ? 1 the highest value of the ripple current occurs at the maximum input voltage: d i v khz h v v l = m () ? ? ? ? = 33 250 10 1 33 22 11 . . .2a the power dissipation on the topside mosfet can be easily estimated. choosing a siliconix si4412dy results in: r ds(on) = 0.042 w , c rss = 100pf. at maximum input voltage with t(estimated) = 50 c: p v v cc v a pf khz mw main = () + () - () [] () + ()()( )( ) = 33 22 3 1 0 005 50 25 0 042 2 5 22 3 100 250 122 2 185 . .. . . w the most stringent requirement for the synchronous n-channel mosfet occurs when v out = 0 (i.e. short circuit). in this case the worst-case dissipation rises to: pi r sync sc avg ds on = () + () () () 2 1 d with the 0.033 w sense resistor i sc(avg) = 4a will result, increasing the si4412dy dissipation to 950mw at a die temperature of 105 c. c in is chosen for an rms current rating of at least 1.5a at temperature. c out is chosen with an esr of 0.03 w for low output ripple. the output ripple in continuous mode will be highest at the maximum input voltage. the output voltage ripple due to esr is approximately: v oripple = r esr ( d i l ) = 0.03 w (1.112a) = 34mv p-p pc board layout checklist when laying out the printed circuit board, the following checklist should be used to ensure proper operation of the ltc1435. these items are also illustrated graphically in the layout diagram of figure 8. check the following in your layout: 1. are the signal and power grounds segregated? the ltc1435 signal ground pin must return to the (C) plate of c out . the power ground connects to the source of the bottom n-channel mosfet, anode of the schottky diode, and (C) plate of c in , which should have as short lead lengths as possible. 2. does the v osense pin connect directly to the feedback resistors? the resistive divider r1, r2 must be con- nected between the (+) plate of c out and signal ground. the 100pf capacitor should be as close as possible to the ltc1435. 3. are the sense C and sense + leads routed together with minimum pc trace spacing? the filter capacitor be- tween sense + and sense C should be as close as possible to the ltc1435. 4. does the (+) plate of c in connect to the drain of the topside mosfet(s) as closely as possible? this capaci- tor provides the ac current to the mosfet(s). 5. is the intv cc decoupling capacitor connected closely between intv cc and the power ground pin? this ca- pacitor carries the mosfet driver peak currents. 6. keep the switching node sw away from sensitive small- signal nodes. ideally the switch node should be placed at the furthest point from the ltc1435. 7. sgnd should be exclusively used for grounding exter- nal components on c osc , i th , v osense and sfb pins.
16 ltc1435 applicatio n s i n for m atio n wu u u c osc run/ss i th sfb sgnd v osense sense sense + tg boost sw v in intv cc bg pgnd extv cc 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 ltc1435 1000pf c c1 470pf c c2 51pf 100pf r c 10k c osc 68pf c ss 0.1 f + 4.7 f t1: dale lpe6562-a236 cmdsh-3 0.1 f 0.01 f m1 si4412dy m2 si4412dy ltc1435 ?ta04 100 100 + c in 22 f 35v 2 mbrs140t3 t1 10 h 1:1.42 r sense 0.033 r1 35.7k 1% r2 20k 1% + c out 100 f 10v 2 sgnd v out 5v/3.5a v in 5.4v to 28v + c sec 3.3 f 35v 4.7k irll014 11.3k 1% 100k 1% v out2 12v 120ma c osc tg 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 ltc1435 100pf 1000pf c c1 c c2 r c c osc c ss + 4.7 f d b d1 c b 0.1 f c in m1 m2 l1 r1 r2 r sense + + v out v in ltc1435 ?f08 bold lines indicate high current paths + c out + run/ss i th sfb sgnd v osense sense sense + sw v in intv cc bg pgnd extv cc boost figure 8. ltc1435 layout diagram typical applicatio n s u dual output 5v and synchronous 12v application
17 ltc1435 typical applicatio n s u 3.3v/4.5a converter with foldback current limiting c osc run/ss i th sfb sgnd v osense sense sense + tg boost sw v in intv cc bg pgnd extv cc 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 ltc1435 1000pf c c1 330pf c c2 51pf 100pf r c 10k c osc 68pf c ss 0.1 f + 4.7 f cmdsh-3 0.1 f m1 si4410dy m2 si4410dy ltc1435 ?ta01 intv cc + c in 22 f 35v 2 mbrs140t3 l1 10 h optional: connect to 5v r sense 0.025 r1 35.7k 1% r2 20k 1% + c out 100 f 10v 2 sgnd (pin 5) v out 3.3v/4.5a v in 4.5v to 28v 100pf in4148 i th pin 3 dual output 5v and 12v application c osc run/ss i th sfb sgnd v osense sense sense + tg boost sw v in intv cc bg pgnd extv cc 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 ltc1435 1000pf c c1 510pf c c2 51pf 100pf r c 10k c osc 68pf c ss 0.1 f + 4.7 f cmdsh-3 0.1 f m1 irf7403 m2 irf7403 ltc1435 ?ta02 100 100 + c in 22 f 35v 2 mbrs140t3 t1 10 h 1:2.2 r sense 0.033 r1 35.7k 1% r2 20k 1% + c out 100 f 10v 2 sgnd v out 5v/3.5a v in 5.4v to 28v mbrs1100t3 + c sec 3.3 f 25v 10k t1: dale lpe6562-a092 90.9k v out2 12v 24v
18 ltc1435 typical applicatio n s u constant-current/constant-voltage high efficiency battery charger 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 tg boost sw v in intv cc bg pgnd extv cc c osc run/ss i th sfb sgnd v osense sense sense + u1 ltc1435 1 2 3 4 8 7 6 5 avg prog v cc pin sense i out gnd nin u2 lt1620 c11 56pf c9 100pf d2 c14 1000pf c10 100pf c15 0.1 m f c6 0.33 m f c5 0.1 m f c13 0.033 m f e3 shdn r5 1k c16 0.33 m f e4 i prog *consult capacitor manufacturer for recommended esr rating for continuous 4a operation e5 gnd c18 0.1 m f r6 10k 1% r prog c17 0.01 m f c12 0.1 m f c4 0.1 m f e3 gnd e1 v in d1 c7 4.7 m f 16v + l1 27 m h c3 22 m f 35v r1 0.025 w e6 batt q1 si4412dy q2 si4412dy e7 gnd c8 100pf r2 1m 0.1% r4 76.8k 0.1% jp1b dc133 f01 + r3 105k 0.1% jp1a c2* 22 m f 35v r7 1.5m c1* 22 m f 35v + + current programming equation i batt = (i prog )(r6) ?0.04 10(r1) efficiency battery charge current (a) 0 efficiency (%) 90 95 100 4 1435 ta05 85 80 75 1 2 3 5 v in = 24v v batt = 16v v batt = 12v v batt = 6v
19 ltc1435 dimensions in inches (millimeters) unless otherwise noted. package descriptio n u information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 0.016 ?0.050 0.406 ?1.270 0.010 ?0.020 (0.254 ?0.508) 45 0 ?8 typ 0.008 ?0.010 (0.203 ?0.254) 1 2 3 4 5 6 7 8 0.150 ?0.157** (3.810 ?3.988) 16 15 14 13 0.386 ?0.394* (9.804 ?10.008) 0.228 ?0.244 (5.791 ?6.197) 12 11 10 9 s16 0695 0.053 ?0.069 (1.346 ?1.752) 0.014 ?0.019 (0.355 ?0.483) 0.004 ?0.010 (0.101 ?0.254) 0.050 (1.270) typ dimension does not include mold flash. mold flash shall not exceed 0.006" (0.152mm) per side dimension does not include interlead flash. interlead flash shall not exceed 0.010" (0.254mm) per side * ** s package 16-lead plastic small outline (narrow 0.150) (ltc dwg # 05-08-1610) g package 16-lead plastic ssop (0.209) (ltc dwg # 05-08-1640) g16 ssop 0795 0.005 ?0.009 (0.13 ?0.22) 0 ?8 0.022 ?0.037 (0.55 ?0.95) 0.205 ?0.212** (5.20 ?5.38) 0.301 ?0.311 (7.65 ?7.90) 1234 5 6 7 8 0.239 ?0.249* (6.07 ?7.33) 14 13 12 11 10 9 15 16 0.068 ?0.078 (1.73 ?1.99) 0.002 ?0.008 (0.05 ?0.21) 0.0256 (0.65) bsc 0.010 ?0.015 (0.25 ?0.38) dimensions do not include mold flash. mold flash shall not exceed 0.006" (0.152mm) per side dimensions do not include interlead flash. interlead flash shall not exceed 0.010" (0.254mm) per side * **
20 ltc1435 linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 l fax : (408) 434-0507 l telex : 499-3977 lt/gp 0896 7k ? printed in usa ? linear technology corporation 1996 typical applicatio n u low dropout 2.9v/3a converter part number description comments ltc1142hv/ltc1142 dual high efficiency synchronous step-down switching regulators dual synchronous, v in 20v ltc1148hv/ltc1148 high efficiency sychronous step-down switching synchronous, v in 20v regulator controllers ltc1159 high efficiency synchronous step-down switching regulator synchronous, v in 40v, for logic threshold fets lt ? 1375/lt1376 1.5a, 500khz step-down switching regulators high frequency, small inductor, high efficiency switchers, 1.5a switch ltc1430 high power step-down switching regulator controller high efficiency 5v to 3.3v conversion at up to 15a ltc1436/ltc1436-pll/ high efficiency low noise synchronous step-down full-featured single controller ltc1437 switching regulators ltc1438/ltc1439 dual high efficiency, low noise, synchronous step-down full-featured dual controllers switching regulators lt1510 constant-voltage/ constant-current battery charger 1.3a, li-ion, nicd, nimh, pb-acid charger ltc1538-aux dual high efficiency, low noise, synchronous step-down 5v standby in shutdown switching regulator ltc1539 dual high efficiency, low noise, synchronous step-down 5v standby in shutdown switching regulator related parts c osc run/ss i th sfb sgnd v osense sense sense + tg boost sw v in intv cc bg pgnd extv cc 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 ltc1435 1000pf c c1 330pf c c2 51pf 100pf r c 10k c osc 68pf c ss 0.1 f + 4.7 f cmdsh-3 0.1 f m1 1/2 si9925dy m2 1/2 si9925dy ltc1435 ?ta03 intv cc + c in 22 f 35v 2 mbrs140t3 l1 10 h optional: connect to 5v l1: sumida cdrh125-10 r sense 0.033 r1 35.7k 1% r2 24.9k 1% + c out 100 f 10v 2 sgnd v out 2.9v/3a v in 3.5v to 25v 100pf

▲Up To Search▲

Price & Availability of LTC1435CS

	To Download LTC1435CS Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .